SC Conference - Activity Details

Filippo Gioachin  (University of Illinois at Urbana-Champaign)

Thursday,  11:45AM - 12:00PM

Room 17A/17B

Debugging applications on large configurations with thousands of processors is a challenging task for various reasons. First of all, there are intrinsic difficulties in debugging parallel programs whose behavior might not be deterministic. Secondly, the lack of debuggers capable of handling more than a few hundred processors. Finally, retaining many processors for long periods of debugging time may be both expensive and unfeasible. This thesis aims to improve the proficiency of debugging message-passing parallel applications by leveraging the processor virtualization as provided by the highly scalable Charm++ RTS. With this novel idea, we can debug large processor configurations using fewer processors, allowing the user to discover bugs more easily. One major issue, and contribution, is to logically separate the behavior of the virtual processors co-residing on the same physical processor. Other contributions include new debugging techniques applied to this environment, such as the detection of message races.